The present invention relates to a semiconductor device having a pressure sensor, for example, a semiconductor device having a silicon diaphragm type pressure sensor.
Semiconductor pressure sensors are known to have the advantages of small size, low-cost and high performance compared with other types of pressure sensors such as the well-known Bourdon tube or mechanical pressure sensors employing bellows. In particular silicon diaphragm type pressure sensors of the most common type semiconductor pressure sensor, and generally possess these advantages.
As shown in FIG. 1, the structure of such a silicon diaphragm type pressure sensor generally consists of a membrane portion 3 (or a relatively thin portion) which is formed so thin as to be deformed by the difference of pressures in spaces over and under this portion. More particularly, the device is formed to comprise a depressed portion 2 in a part of the rear surface of a silicon chip (single crystal Si substrate) 1, and four diffused resistors 4 which are formed as piezoresistive elements in the front surface of the membrane portion 3. The diffused resistors are connected as a bridge network, and the electrical resistances of the resistors change when the membrane portion 3 is deformed by mechanical motion or stress. Thus, the semiconductor pressure sensor detects pressure electrically by virtue of these changes in the resistance of the bridge arrangement.
Such silicon diaphragm type pressure sensor can be manufactured by the following steps. First of all, B (boron) is diffused into parts of the one surface of a single crystal Si substrate 1, thereby to form the diffused resistors 4. The other surface of the Si substrate 1 is ground like a mirror. Thereafter, as shown in FIG. 2, the other surface part of the single crystal Si substrate 1 having approximately 280 .mu.m thickness is subjected to anisotropic etching with an alkali etchant such as KOH (potassium hydroxide), whereby the depressed portion 2 is formed so as to leave the membrane portion 3 which is approximately 25 .mu.m in thickness.
The following problems, however, have been recognized by the inventors.
To begin with, in etching the depressed portion, it is difficult to form the membrane portion 3, namely the diaphragm, uniformly and precisely at the thickness of approximately 25 .mu.m. Also, as shown in FIG. 2, the etched Si surface which corresponds to the membrane portion 3 does not become flat on account of such drawbacks as foreign material, contamination and crystal defects. Instead, it is formed with corrugations 5 which have an unevenness of .+-.5 .mu.m. The corrugations are apt to cause strain in the case of the pressure deformation, and this greatly limits the ability to manufacture pressure sensors of high sensitivity with good reproducibility.
Regarding such a semiconductor pressure sensor, a method of forming the membrane portion to an accurate thickness is disclosed in the specification of U.S. Pat. No. 3,893,228. According to the disclosure, the thickness of the membrane portion is controlled by utilizing a p.sup.+ -type epitaxial layer as an etching stopper. The literature, however, does not disclose the flattening of the membrane portion at all and does not contain any suggestive statement regarding this. In reviewing this patent, the applicants have concluded that it is unlikely that the method of forming the semiconductor pressure sensor taught in the literature will satisfactorily flatten the membrane portion for the reason stated below.
As is well known, in a case where a semiconductor layer has been formed on a semiconductor substrate by epitaxial growth, it has a uniform impurity concentration in the thickness direction thereof. In the case of the disclosed technique, therefore, an abrupt change is involved between the impurity concentration of the substrate and that of the epitaxial semiconductor layer. As shown in FIG. 3a, accordingly, when the rear (the other) surface of the substrate 1 has been etched while holding an uneven state (indicated by a dotted line) till arriving at the epitaxial semiconductor layer EP, parts of the substrate 1 are left as protuberances 5. In order to completely remove the protuberances 5, the substrate 1 must be exposed to an etchant for a a certain period of time. Meantime, the epitaxial semiconductor layer EP is also etched, although at a rate lower than the etching rate of the protuberances 5. In any event, because of this etching of the layer EP, after the protuberances 5 have been completely removed, the epitaxial semiconductor layer EP is left with an undesirably roughened surface as shown in FIG. 3b. Further, it is difficult to perfectly remove the roughened surface to provide a smooth surface, because the epitaxial semiconductor layer EP has a uniform impurity concentration, as noted previously.